{"product_id":"ge-ic697cgr772-series-90-70-dual-bus-cpu-module","title":"GE IC697CGR772 Series 90-70 Dual Bus CPU Module","description":"\u003cp\u003eConfigured for high-availability and fault tolerance tasks in Series 90-70 networks, the \u003cstrong\u003eGE IC697CGR772\u003c\/strong\u003e (\u003cstrong\u003eIC697CGR772\u003c\/strong\u003e CPU Module) provides direct physical\/electrical execution of logic synchronization and dual-bus redundancy routing. The module utilizes an internal 80486DX4 microprocessor running at 96 MHz to maintain deterministic execution time across localized digital and analog hardware maps.\u003c\/p\u003e\n\u003ch3\u003eHardware Specifications\u003c\/h3\u003e\n\u003cfigure class=\"table\"\u003e\n\u003ctable\u003e\n\u003cthead\u003e\n\u003ctr\u003e\n\u003cth\u003e\u003cstrong\u003eParameter\u003c\/strong\u003e\u003c\/th\u003e\n\u003cth\u003e\u003cstrong\u003eSpecification\u003c\/strong\u003e\u003c\/th\u003e\n\u003c\/tr\u003e\n\u003c\/thead\u003e\n\u003ctbody\u003e\n\u003ctr\u003e\n\u003ctd\u003eModel\u003c\/td\u003e\n\u003ctd\u003eIC697CGR772\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eBrand\u003c\/td\u003e\n\u003ctd\u003eGE Fanuc Emerson\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eOrigin\u003c\/td\u003e\n\u003ctd\u003eUSA\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eWeight\u003c\/td\u003e\n\u003ctd\u003e0.79 kg (1.75 lbs)\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eDimensions\u003c\/td\u003e\n\u003ctd\u003eStandard Series 90-70 single-slot width\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eOperating Temp\u003c\/td\u003e\n\u003ctd\u003e0 to 50 deg C\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003ePower Consumption\u003c\/td\u003e\n\u003ctd\u003e15.5 W (3.1 A @ 5 VDC)\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eProcessor Type\u003c\/td\u003e\n\u003ctd\u003e80486DX4 Microprocessor\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eClock Speed\u003c\/td\u003e\n\u003ctd\u003e96 MHz\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eUser Memory\u003c\/td\u003e\n\u003ctd\u003e512 KB CMOS RAM (Battery-Backed)\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eBoolean Execution Speed\u003c\/td\u003e\n\u003ctd\u003e0.4 microseconds\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eDiscrete I\/O Capacity\u003c\/td\u003e\n\u003ctd\u003e2048 Inputs \/ 2048 Outputs\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eAnalog I\/O Capacity\u003c\/td\u003e\n\u003ctd\u003e8000 Channels Max\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eSerial Interfaces\u003c\/td\u003e\n\u003ctd\u003e1x RS-232, 2x RS-485\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eBase Protocol Support\u003c\/td\u003e\n\u003ctd\u003eGE SNP Protocol\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eBackup Power Source\u003c\/td\u003e\n\u003ctd\u003eIC697ACC701 \/ IC697ACC771 Lithium Battery\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003c\/tbody\u003e\n\u003c\/table\u003e\n\u003c\/figure\u003e\n\u003ch3\u003eIndustrial Control and Network Determinism\u003c\/h3\u003e\n\u003cp\u003eThe IC697CGR772 maintains synchronized system integrity via specific backplane bus communication velocity protocols optimized for hot-standby topologies. The hardware configuration enables real-time memory mirroring over its dual-bus interface to support bumpless control transfers within a single-scan 5.9 ms window. Firmware flash compatibility governs synchronous tracking of user logic and register states, preventing data truncation or network arbitration delay when balancing large scale I\/O density profiles.\u003c\/p\u003e\n\u003ch3\u003eFrequently Asked Questions\u003c\/h3\u003e\n\u003cp\u003eQ: What are the specific power isolation rules required during hardware maintenance of the IC697CGR772?\u003c\/p\u003e\n\u003cp\u003eA: The IC697CGR772 does not support unpowered hot-swapping. The complete rack backplane assembly must be mechanically isolated from the main 5 VDC source before removing or seating the module to avoid memory corruption or interface degradation.\u003c\/p\u003e\n\u003cp\u003eQ: How does the CPU indicate a critical breakdown or a depleted backup lithium battery condition?\u003c\/p\u003e\n\u003cp\u003eA: Diagnostic states are routed to the front-facing LED matrix. If the backup voltage dropped by the lithium battery falls below the logic threshold during a power-up cycle, the Module OK LED will fail to initialize or maintain a steady active state.\u003c\/p\u003e\n\u003ch3\u003eField Installation Guidelines\u003c\/h3\u003e\n\u003cul\u003e\n\u003cli\u003e\n\u003cstrong\u003eBaseplate Assignment Constraints:\u003c\/strong\u003e Mount the CPU module strictly into the leftmost slot of the primary rack assembly to establish proper master bus configuration and enable electrical connection to the memory protection logic switch.\u003c\/li\u003e\n\u003cli\u003e\n\u003cstrong\u003eShielding and Grounding Standards:\u003c\/strong\u003e Terminate all serial communication cabling (RS-232 and RS-485) using external braided shielding. Fix shields directly to the chassis frame ground clamp to reduce noise induction on the SNP network.\u003c\/li\u003e\n\u003cli\u003e\n\u003cstrong\u003eRedundancy Configuration Mapping:\u003c\/strong\u003e Ensure both identical hot-standby CPU processors contain matching firmware baselines and user register capacities to execute precise single-scan backup operations across the redundant physical slots.\u003c\/li\u003e\n\u003c\/ul\u003e","brand":"GE Fanuc","offers":[{"title":"Default Title","offer_id":43623311835226,"sku":"IC697CGR772","price":0.0,"currency_code":"USD","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0710\/5957\/0778\/files\/IC697CGR772.png?v=1783564184","url":"https:\/\/www.spareoil.com\/products\/ge-ic697cgr772-series-90-70-dual-bus-cpu-module","provider":"SpareOil Automation","version":"1.0","type":"link"}